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 MC10EP32, MC100EP32 3.3V / 5V ECL B2 Divider
The MC10/100EP32 is an integrated B2 divider with differential CLK inputs. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The reset pin is asynchronous and is asserted on the rising edge. Upon power-up, the internal flip-flops will attain a random state; the reset allows for the synchronization of multiple EP32's in a system. The 100 Series contains temperature compensation.
http://onsemi.com MARKING DIAGRAMS*
8 8 1 SOIC-8 D SUFFIX CASE 751 HEP32 ALYW 1 1 8 KEP32 ALYW
* 350 ps Typical Propagation Delay * Maximum Frequency > 4 GHz Typical (Figure 3) * PECL Mode Operating Range: *
VCC = 3.0 V to 5.5 V with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = -3.0 V to -5.5 V Open Input Default State
8 1 TSSOP-8 DT SUFFIX CASE 948R
8 HP32 ALYW 1
8 KP32 ALYW 1
* * Safety Clamp on Inputs * Q Output Will Default LOW with Inputs Open or at VEE * Pb-Free Package is Available
H = MC10 K = MC100 A = Assembly Location
L = Wafer Lot Y = Year W = Work Week
*For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 7 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2004
1
June, 2004 - Rev. 7
Publication Order Number: MC10EP32/D
MC10EP32, MC100EP32
Table 1. PIN DESCRIPTION
RESET 1 R CLK 2 B2 CLK 3 6 Q 7 Q 8 VCC Pin CLK, CLK* Reset* VBB Q, Q VCC VEE Function ECL Clock Inputs ECL Asynchronous Reset Reference Voltage Output ECL Data Outputs Positive Supply Negative Supply
*Pins will default LOW when left open. VBB 4 5 VEE
Table 2. TRUTH TABLE Figure 1. 8-Lead Pinout (Top View) and Logic Diagram
CLK X Z CLK X Z RESET Z L Q L F Q H F
Z = LOW to HIGH Transition Z = HIGH to LOW Transition F = Divide by 2 Function
CLK tRR RESET
Q
Figure 2. Timing Diagram
Table 3. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Value 75 kW N/A > 4 kV > 200 V > 2 kV Level 1 UL 94 V-0 @ 0.125 in 78 Devices
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
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2
MC10EP32, MC100EP32
Table 4. MAXIMUM RATINGS
Symbol VCC VEE VI Iout IBB TA Tstg qJA qJC qJA qJC Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current VBB Sink/Source Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Wave Solder 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board <2 to 3 sec @ 248C SOIC-8 SOIC-8 SOIC-8 TSSOP-8 TSSOP-8 TSSOP-8 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI v VCC VI w VEE Condition 2 Rating 6 -6 6 -6 50 100 0.5 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 265 Unit V V V V mA mA mA C C C/W C/W C/W C/W C/W C/W C
Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected.
Table 5. 10EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 2)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 4) Input HIGH Current Input LOW Current 0.5 Min 23 2165 1365 2090 1365 1790 2.0 1890 Typ 30 2290 1490 Max 37 2415 1615 2415 1690 1990 3.3 150 0.5 Min 23 2230 1430 2155 1430 1855 2.0 1955 25C Typ 30 2355 1555 Max 37 2480 1680 2480 1755 2055 3.3 150 0.5 Min 23 2290 1490 2215 1490 1915 2.0 2015 85C Typ 30 2415 1615 Max 37 2540 1740 2540 1815 2115 3.3 150 Unit mA mV mV mV mV mV V mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 3. All loading with 50 W to VCC - 2.0 V. 4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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3
MC10EP32, MC100EP32
Table 6. 10EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 5)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 6) Output LOW Voltage (Note 6) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 7) Input HIGH Current Input LOW Current 0.5 Min 23 3865 3065 3790 3065 3490 2.0 3590 Typ 30 3990 3190 Max 37 4115 3315 4115 3390 3690 5.0 150 0.5 Min 23 3930 3130 3855 3130 3555 2.0 3655 25C Typ 30 4055 3255 Max 37 4180 3380 4180 3455 3755 5.0 150 0.5 Min 23 3990 3190 3915 3190 3615 2.0 3715 85C Typ 30 4115 3315 Max 37 4240 3440 4240 3515 3815 5.0 150 Unit mA mV mV mV mV mV V mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 6. All loading with 50 W to VCC - 2.0 V. 7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 7. 10EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = -5.5 V to -3.0 V (Note 8)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 9) Output LOW Voltage (Note 9) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 10) Input HIGH Current Input LOW Current 0.5 Min 23 -1135 -1935 -1210 -1935 -1510 -1410 Typ 30 -1010 -1810 Max 37 -885 -1685 -885 -1610 -1310 0.0 Min 23 -1070 -1870 -1145 -1870 -1445 -1345 25C Typ 30 -945 -1745 Max 37 -820 -1620 -820 -1545 -1245 0.0 Min 23 -1010 -1810 -1085 -1810 -1385 -1285 85C Typ 30 -885 -1685 Max 37 -760 -1560 -760 -1485 -1185 0.0 Unit mA mV mV mV mV mV V
VEE+2.0
VEE+2.0
VEE+2.0
IIH IIL
150 0.5
150 0.5
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 8. Input and output parameters vary 1:1 with VCC. 9. All loading with 50 W to VCC - 2.0 V. 10. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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4
MC10EP32, MC100EP32
Table 8. 100EP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 11)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 12) Output LOW Voltage (Note 12) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 13) Input HIGH Current Input LOW Current 0.5 Min 23 2155 1355 2075 1355 1775 2.0 1875 Typ 30 2280 1480 Max 37 2405 1605 2420 1675 1975 3.3 150 0.5 Min 26 2155 1355 2075 1355 1775 2.0 1875 25C Typ 34 2280 1480 Max 40 2405 1605 2420 1675 1975 3.3 150 0.5 Min 28 2155 1355 2075 1355 1775 2.0 1875 85C Typ 36 2280 1480 Max 42 2405 1605 2420 1675 1975 3.3 150 Unit mA mV mV mV mV mV V mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 11. Input and output parameters vary 1:1 with VCC. VEE can vary +0.3 V to -2.2 V. 12. All loading with 50 W to VCC - 2.0 V. 13. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 9. 100EP DC CHARACTERISTICS, PECL VCC = 5.0 V, VEE = 0 V (Note 14)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR IIH IIL Characteristic Power Supply Current Output HIGH Voltage (Note 15) Output LOW Voltage (Note 15) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 16) Input HIGH Current Input LOW Current 0.5 Min 23 3855 3055 3775 3055 3475 2.0 3575 Typ 30 3980 3180 Max 37 4105 3305 4120 3375 3675 5.0 150 0.5 Min 26 3855 3055 3775 3055 3475 2.0 3575 25C Typ 34 3980 3180 Max 40 4105 3305 4120 3375 3675 5.0 150 0.5 Min 28 3855 3055 3775 3055 3475 2.0 3575 85C Typ 36 3980 3180 Max 42 4105 3305 4120 3375 3675 5.0 150 Unit mA mV mV mV mV mV V mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 14. Input and output parameters vary 1:1 with VCC. VEE can vary +2.0 V to -0.5 V. 15. All loading with 50 W to VCC - 2.0 V. 16. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC10EP32, MC100EP32
Table 10. 100EP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = -5.5 V to -3.0 V (Note 17)
-40C Symbol IEE VOH VOL VIH VIL VBB VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 18) Output LOW Voltage (Note 18) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Output Voltage Reference Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 19) Input HIGH Current Input LOW Current 0.5 Min 23 -1145 -1945 -1225 -1945 -1525 -1425 Typ 30 -1020 -1820 Max 37 -895 -1695 -880 -1625 -1325 0.0 Min 26 -1145 -1945 -1225 -1945 -1525 -1425 25C Typ 34 -1020 -1820 Max 40 -895 -1695 -880 -1625 -1325 0.0 Min 28 -1145 -1945 -1225 -1945 -1525 -1425 85C Typ 36 -1020 -1820 Max 42 -895 -1695 -880 -1625 -1325 0.0 Unit mA mV mV mV mV mV V
VEE+2.0
VEE+2.0
VEE+2.0
IIH IIL
150 0.5
150 0.5
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 17. Input and output parameters vary 1:1 with VCC. 18. All loading with 50 W to VCC - 2.0 V. 19. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 11. AC CHARACTERISTICS VCC = 0 V; VEE = -3.0 V to -5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 20)
-40C Symbol VOPP Characteristic Output Voltage Amplitude (See Figure 3) Propagation Delay to Output Differential 10 Series 100 Series Set/Reset Recovery Minimum Pulse width RESET fin < 3.5 GHz fin @ 4.0 GHz CLK to Q, Q RESET to Q, Q RESET to Q, Q Min Typ 700 740 330 290 400 175 475 0.5 0.5 150 Q, Q 50 800 100 420 390 480 Max Min 25C Typ 700 710 350 300 400 175 475 0.5 0.5 150 70 800 120 450 390 480 Max Min 85C Typ 700 600 ps 250 220 320 200 550 270 250 320 200 550 320 320 375 200 550 400 380 450 175 475 0.5 0.5 150 70 800 130 480 460 525 ps ps ps 1.5 1200 150 1.5 1200 170 1.5 1200 200 mV ps Max Unit mV 640 630 500
tPLH, tPHL
tRR tPW tJITTER
CLOCK Random Jitter (RMS) fin < 3.5 GHz fin @ v4.0 GHz Input Voltage Swing (Differential Configuration) Output Rise/Fall Times (20% - 80%)
VPP tr tf
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 20. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V.
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6
MC10EP32, MC100EP32
850 800 750 700 650 600 550 500 450 400 350 300 250 200 150 100 50 0 0.0
5.0 V 3.3 V
VOPP, OUTPUT VOLTAGE (mV)
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
fin, INPUT FREQUENCY (GHz)
Figure 3. Input Frequency (fin) versus Typical Output Voltage (VOPP)
Q Driver Device Q
Zo = 50 W
D Receiver Device
Zo = 50 W 50 W 50 W
D
VTT VTT = VCC - 2.0 V
Figure 4. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
ORDERING INFORMATION
Device MC10EP32D MC10EP32DG MC10EP32DR2 MC10EP32DT MC10EP32DTR2 MC100EP32D MC100EP32DR2 MC100EP32DT MC100EP32DTR2 Package SOIC-8 SOIC-8 (Pb-Free) SOIC-8 TSSOP-8 TSSOP-8 SOIC-8 SOIC-8 TSSOP-8 TSSOP-8 Shipping 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 100 Units / Rail 2500 / Tape & Reel 98 Units / Rail 2500 / Tape & Reel 100 Units / Rail 2500 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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7
MC10EP32, MC100EP32
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1642/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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8
MC10EP32, MC100EP32
PACKAGE DIMENSIONS
-X- A
8 5
SOIC-8 NB D SUFFIX PLASTIC SOIC PACKAGE CASE 751-07 ISSUE AB
B
1 4
S
0.25 (0.010)
M
Y
M
-Y- G C -Z- H D 0.25 (0.010)
M SEATING PLANE
K
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060 7.0 0.275 4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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9
MC10EP32, MC100EP32
PACKAGE DIMENSIONS
TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8
5
L
1 PIN 1 IDENT 4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
-W- G DETAIL E
DIM A B C D F G K L M
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative.
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10
MC10EP32/D


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